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NTE1857 Integrated Circuit Stepper Motor Driver
Description: The NTE1857 is designed to drive a two-phase stepper motor in the bipolar mode, The circuit of four input sections, a logic decoding/sequencing section, two driver-stages for the motor coils, and an output to indicate the Phase A drive state. Input Truth Table: Features: D Single Supply Operation: +7.2V to +16.5V Input Low Input High D 350mA/Coil Drive Capability CW/CCW CW CCW D Clamp Diodes Provided for Back-EMF Full/Half Step Full Step Half Step Suppression D Selectable CW/CCW and Full/Half Step OIC Hi Z Low Z Operation Clk Positive Edge Triggered D Selectable High/Low Output Impedance (Half Step Mode) D TTL/CMOS Compatible Inputs D Input Hysteresis: 400mV Min D Phase Logic Can Be Initialized to Phase A D Phase A Output Drive State Indication (Open-Collector) Absolute Maximum Ratings: (Note 1) Supply Voltage, VM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +18V Clamp Diode Cathode Voltage (Pin1), VD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VM +5.0V Driver Output Voltage (Pins 2, 3, 14, 15), VOD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VM +6.0V Driver Output Current/Coil, IOD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500mA Input Voltage (Pins 7, 8, 9, 10), Vin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 to +7.0V Bias/Set Current (Pin6), IBS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -10mA Phase A Output Voltage (Pin11), VOA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +18V Phase A Sink Current (Pin11), IOA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA Junction Temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +150C Storage Temperature Range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65 to +150C Thermal Resistance, Junction-to-Ambient (No Heat Sink), RthJA . . . . . . . . . . . . . . . . . . . . . 45C/W Note 1. "Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be operated at these limits. The "Electrical Characteristics" tables provide conditions for actual device operation.
Recommended Operating Conditions:
Characteristic Supply Voltage Clamp Diode Cathode Voltage Driver Output Current (Per Coil) Input Voltage (Pins 7, 8, 9, 10) Bias/Set Current (Outputs Active) Phase A Output Voltage Phase A Sink Current Operating Ambient Temperature Symbol VM VD IOD Vin IBS VOA IOA TA Min +7.2 VM - 0 -300 - 0 0 Max +16.5 VM + 4.5 350 +5.5 -75 VM 8.0 +70 Unit Vdc Vdc mA Vdc A Vdc mA C
DC Electrical Characteristics: (Specifications apply over the recommended supply voltage and temperature ranges unless otherwise specified, See Notes 2, 3)
Parameter Input Logic Levels Threshold Voltage (Low-to-High) Threshold Voltage (High-to-Low) Hysteresis Current 7, 8, 9, 10 VTLH VHTL VHYS IIL IIH1 IIH2 Driver Output Levels Output High Voltage Output Low Voltage Differential Mode Output Voltage Difference Common Mode Output Voltage Difference Output Leakage - HiZ State 2, 3, 14, 15 VOHD VOLD DVOD CVOD IOZ1 IOZ2 IBS = -300A IOD = -350mA IOD = -0.1mA IBS = -300A, IOD = 350mA IBS = -300A, IOD = 350mA, Note 4 IBS = -300A, IOD = -0.1mA, Note 5 0 VOD VM IBS = -5A IBS = -300A, Pin9 = 2V, Pin8 = 0.8V VM-2.0 VM-1.2 - - - -100 -100 - - - - - - - - - 0.8 0.15 0.15 +100 +100 V V V V V A A VI = 0.4V VI = 5.5V VI = 2.7V - 0.8 0.4 -100 - - - - - - - - 2.0 - - - +100 +20 V V V A A A Pins Symbol Test Conditions Min Typ Max Unit
Clamp Diodes Forward Voltage Leakage Current (Per Diode) 1, 2, 3, 14, 15 VDF IDR Pin1 = 21V, Pins 2, 3, 14, 15 = 0V, IBS = 0A - - 2.5 - 3.0 100 V A
Note 2. Algebraic convention rather than absolute values is used to designate limit values. Note 3. Current into a pin is designated as positive. Current out of a pin is designated as negative. Note 4. DVOD = |VOD1,2 - VOD3,4| where VOD1,2 = (VOHD1 - VOLD2) or (VOHD2 - VOLD1), and VOD3,4 = (VOHD3 - VOLD4) or (VOHD4 - VOLD3). Note 5. CVOD = |VOHD1 - VOHD2| or |VOHD3 - VOHD4|.
DC Electrical Characteristics (Cont'd):
(Specifications apply over the recommended supply voltage and temperature ranges unless otherwise spe- cified, See Notes 2, 3)
Test Conditions IOA = 8mA VOHA = 16.5V IOD = 0A, IBS = -300A, L1 = VOHD, L2 = VOLD L3 = VOHD, L4 = VOLD L3 = HiZ, L4 = HiZ L3 = VOHD, L4 = VOLD Min - - - - - -5.0 Typ - - - - - - Max 0.4 100 70 40 75 - Unit V A mA mA mA A
Parameter Phase A Output Output Low Voltage Off State Leakage Current Power Supply Power Supply Current
Pins 11
Symbol VOLA IOHA
16
IMW IMZ IMN
Bias/Set Current To Set Phase A 6 IBS
Note 2. Algebraic convention rather than absolute values is used to designate limit values. Note 3. Current into a pin is designated as positive. Current out of a pin is designated as negative. AC Switching Characteristics: (TA = +25C, VM = 12V unless otherwise specified)
Parameter Clock Frequency Clock Pulse Width - High Clock Pulse Width - Low Bias/Set Pulse Width Setup Time - CW/CCW and F/HS Hold Time - CW/CCW and F/HS Propagation Delay - Clk-to-Driver Output Propagation Delay - Bias/Set-to-Driver Output Propagation Delay - Clk-to-Phase A Low Propagation Delay - Clk-to-Phase A High 7-11 7-11 Pins 7 7 7 6 10-7, 9-7 10-7, 9-7 Symbol Test Conditions fCK PWCKH PWCKL PWBS tsu th tPCD tPBSD tPHLA tPLHA Min 0 10 10 10 5 10 - - - - Typ - - - - - - 8 1 12 5 Max 50 - - - - - - - - - Unit kHz s s s s s s s s s
Pin Description:
Name
Power Supply Ground
Symbol
VM GND
Pin #
16 4, 5, 12, 13 1
Description
Power supply pin for both the logic circuit and the motor coil current. Voltage is +7.2 to +16.5V. Ground pins for the logic circuit and the motor coil current. The physical configuration of the pins aids in dissipating heat from within the IC package. This pin is used to protect the outputs where large voltage spikes may occur as the motor coils are switched. Typically a diode is connected between this pin and Pin16. High current outputs for the motor coils. L1 and L2 are connected to one coil, and L3 and L4 to the other coil. This pin is typically 0.7 below VM. The current out of this pin (through a resistor to GND) determines the maximum output sink current. If the pin is opened (IBS < 5.0A) the outputs assume a high impedance condition, while the internal logic presets to a Phase A condition. The positive edge of the clock input switches the outputs to the next position. This input has no effect if Pin6 is open.
Clamp Diode Voltage Driver Outputs Bias/Set
VD
L1, L2, L3, L4 B/S
2, 3, 14, 15 6
Clock
Clk
7
Pin Description (Cont'd):
Name
Full/Half Step
Symbol
F/HS
Pin #
9
Description
When low (Logic "0"), each clock pulse will cause the motor to rotate one full step. When high, each clock pulse will cause the motor to rotate one- half step. See Fig. 1 for sequences. This input allows reversing the rotation of the motor. See Fig. 1 for sequence. This input is relevant only in the half step mode (Pin9 > 2.0V). When low (Logic "0") the two driver outputs of the non-energized coil will be in a high impedance condition. When high the same driver outputs will be at a low impedance referenced to VM. See Figure 1. This open-collector output indicates (when low) that the driver outputs are in the Phase A condition (L1 = L3 = VOHD, L2 = L4 = VOLD).
Clockwise/ Counterclockwise Output Impedance Control
CW/CCW OIC
10 8
Phase A
Ph A
11
Application Information: General The NTE1857 integrated circuit is designed to drive a stepper positioning motor in applications such as disk drives and robotics. The outputs can provide up to 350mA to each of two coils of a two-phase motor. The outputs change state with each low-to-high transition of the clock input, with the new output state depending on the previous state, as well as the input conditions on Pins 8, 9, and 10. Outputs (Pins 2, 3, 14, 15) The outputs (L1-L4) are high current outputs, which when connected to a two-phase motor, provide two full-bridge configurations. The polarities applied to the motor coils depend on which transistor (QH or QL) of each output is on, which in turn depends on the inputs and the decoding circuitry. The maximum sink current available at the outputs is a function of the resistor connected between Pin6 and GND (see section on Bias/Set operation). Whenever the outputs are to be in a high impedance state, both transistors (QH and QL) of each output are off. VD (Pin1) This pin allows for provision of a current path for the motor coil current during switching, in order to suppress back-EMF voltage spikes. Pin1 is normally connected to VM (Pin16) through a diode (zener or regular), a resistor, or directly. The peak instantaneous voltage at the outputs (Pins 2, 3, 14, and 15) must not exceed VM by more than 6 volts. The voltage drop across the internal clamping diodes must be included in design. Parasitic diodes across each QL of each output provide for a complete circuit path for the switched current. Full/Half Step (Pin9) When this input is at a Logic "0" (< 0.8 volts), the outputs change a full step with each clock cycle, with the sequence direction depending on the CW/CCW input (Pin10). There are four steps (Phase A,B,C,D) for each complete cycle of the sequencing logic. Current flows through both motor coils during each step. When taken to a Logic "1" (> 2.0 volts), the outputs change a half step with each clock cycle, with the sequence direction depending on the CW/CCW input (Pin10). Eight steps (Phases A-H) result for each complete cycle of the sequencing logic. Phases A,C,E and G correspond (in polarity) to the phases A, B, C, and D, respectively, of the full step sequence. Phases B, D, F and H provide current to one motor coil, while de-energizing the other coil. The condition of the outputs of the de-energized coil depends on the OIC input (Pin8). OIC (Pin8) The output impedance control input determines the output impedance to the de-energized coil when operating in the half-step mode. When the outputs are in Phase B, D, F or H and this input is at a Logic "0" (< 0.8V), the two outputs to the de-energized coil are in a high-impedance condition-QL and QH of both outputs are off. When this input is at a Logic "1" (> 2.0V), a low impedance output is provided to the de-energized coil as both outputs have QH on (QL off). To complete the low impedance path requires connecting Pin1 (VD) to Pin16 (VM) as described elsewhere in this data sheet.
Bias/Set (Pin6) This pin can be used for three functions: a) determining the maximum output sink current; b) setting the internal logic to a known state; and c) reducing power consumption. a) The maximum output sink current is determined by the base drive current supplied to the lower transistors (QL's) of each output, which in turn, is a functional of IBS. The appropriate value of IBS is determined by; IBS = IOD x 0.86 where IBS is in microamps, and IOD is the motor current/coil in milliamps. The value of RB (between Pin6 and GND) is then determined by: V - 0.7V RB = M IBS b) When Pin 6 is opened (raised to VM) such that IBS is < 5.0 A, the internal logic is set to the Phase A condition, and the four driver outputs are put into a high impedance state. The Phase A output (Pin11) goes active (low), and input signals at Pins 7,8,9 and 10 are ignored (low), and input signals at Pins 7, 8, 9, and 10 are ignored during this time. Upon re-establishing IBS, the driver outputs become active, and will be in the Phase A position (L1 = L3 = VOHD, L2 = L4=VOLD). The circuit will then respond to the inputs at Pins 7, 8, 9, and 10. The Set function (opening Pin6) can be used as a power-up reset while supply voltages are settling. A CMOS logic gate (powered by VM) can be used to control this pin. c) Whenever the motor is not being stepped, power dissipation in the IC and in the motor may be lowered by reducing IBS, so as to reduce the output (motor) current. Setting IBS to 75A will reduce the motor current, but will not reset the internal logic as described above. Power Dissipation The power dissipated by the NTE1857 must be such that the junction temperature (TJ) does not exceed 150C. The power dissipated can be expressed as: P=(VM x IM) + (2 x IOD) [(VM - VOHD) + VOLD] where VM = Supply voltage: IM = Supply current other than IOD: IOD = Output current to each motor coil; VOHD = Driver output high voltage; VOLD = Driver output low voltage. If TJ is higher than 150C, a heat sink could be used to reduce RJA. In extreme cases forced air cooling should be considered. It is assumed that a ground plane is provided under the NTE1857 (either or both sides of the PC board) to aid in the heat dissipation. Single nominal width traces leading from the four ground pins should be avoided as this will increase TJ, as well as provide potentially disruptive ground noise and IR drops when switching the motor current.
Pin Connection Diagram VD 1 L2 2 L1 3 GND 4 GND 5 BIAS/SET 6 CLK 7 OIC 8 16 VM 15 L3 14 L4 13 GND 12 GND 11 PHASE A 10 CW/CCW 9 FULL/HALF STEP
Fig. 1 - Output Sequence
Clk Bias/Set CW/CCW Phase A L1 L2 L3 L4 Phase A Output F/HS OIC F G H = High Impedance = Logic "0" = Don't Care A B C D B C D A B C B A D C B
(a) Full Step Mode A L1 L2 L3 L4 B C D E
(b) Half Step Mode A L1 L2 L3 L4 Phase A Output B C D E F
= High Impedance CW/CCW = Logic "0" = Logic "1", OIC = Logic "0" F/HS G H A B C D
(c) Half Step Mode
CW/CCW = Logic "0" = Logic "1" F/HS OIC = Logic "1"
16
9
.260 (6.6) Max
1
8
.785 (19.9) Max .200 (5.08) Max .245 (6.22) Min .100 (2.54) .700 (17.7)
.300 (7.62)

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